課題番号 ：S-19-OS-0061
利用形態 ：機器利用
利用課題名（日本語） ：高電流密度下でのAgのエレクトロマイグレーション現象
Program Title (English) ：Electromigration in Ag thin films under high current density
利用者名（日本語） ：金智、 西川 宏
Username (English) ：JIN Zhi，NISHIKAWA Hiroshi
所属名（日本語） ：大阪大学接合科学研究所
Affiliation (English) ：Osaka University, JWRI

１．概要（Summary ）
The electro-migration behavior of an Ag thin film stripe that is deposited on a glass substrate has been investigated under a high current density in the absence of thermo-migration. The distribution of voids and hillocks at current densities of 4.4–6.0 × 104 A/cm2 has been analyzed optically and using electron microscopy. The voids mainly formed at the cathode side of the stripe where maximum current density was predicted but voids also formed along a line that crosses the stripe. This was explained in terms of the initial voids forming at locations of maximum current density concentration, altering these locations, and then expanding into them. The movement of the maximum current density location is caused by redistribution of current as the voids form. However, the temperature dependence of the diffusivity of atoms is sufficient to account for void nucleation within the timescale of the experiments.
２．実験（Experimental）
【利用した主な装置】
S10 RF Sputtering System
Model: SVC-700 LRF
S17 Stylus Profiler
Model: Dektak-XT

【実験方法】
An Ag adhesion film with 300 nm thickness is coated on a 150 μm thick glass cover slip using an evaporation technique in vacuum. The 305 μm wide, 5 mm long solder stripe geometry was created by using a glass mask during the evaporation deposition process. The thickness change has been checked after test.

３．結果と考察（Results and Discussion）
We use sputtering machine to make the samples. However, the effect is not ideal. The thickness change on the cathode and anode has been recorded, due to the whisker generation on the anode side, the thickness became higher on some parts. In the meanwhile, the generation of voids on the cathode causing some thickness decrease on the cathode.

Fig 1. The thickness change of the sample after EM test

４．その他・特記事項（Others）
Reference: Chan, Y. C., & Yang, D. (2010). Failure mechanisms of solder interconnects under current stressing in advanced electronic packages. Progress in Materials Science, 55(5), 428-475.

５．論文・学会発表（Publication/Presentation）
None

６．関連特許（Patent）
None